Datasheet

A Single Source for Register Map
An address map for a new design has reached a level of complexity which renders its specification and subsequent modification prohibitively expensive. Hardware, software, verification, and technical publication groups use the address map to develop a product. A single source for the Register Address Map eliminates wasted time debugging typos, missing parameters, and stale specifications. Semifore’s parameterized register templates allow design teams to define their best practices for implementation. This correct-by-construction methodology extends to hierarchical standards and re-use of configurable IP blocks.

Inputs

  • Excel Spreadsheets
  • Spirit IP-XACT XML
  • SystemRDL
  • CSRSpec Language
  • Legacy Input Languages

Major Components

CSRSpecTM is the next generation language with a powerful set of features that includes:

  • Hierarchical address map specification : arrays of objects, groups of registers
  • Parameterized templates
  • Object oriented architecture
  • Fields wider than a register

CSRCompilerTM
CSRCompiler-RTL generates hardware, and internal documentation views:

  • Synthesizable RTL: Verilog or VHDL
  • Documentation: Dynamic HTML, Word, Excel
  • Data Structures: Perl
  • Interchange: Spirit IP-XACT XML

CSRCompiler-Verification generates hardware verification views and tools:

  • Headers:  Verilog, VHDL, Vera, SystemVerilog
  • Verification Test Bench

CSRCompiler-SW generates software views:

  • Headers: C, Assembly
  • Data Structures: Perl, C

CSRCompiler-TechWriter generates complete internal and customer documentation views:

  • Documentation: Dynamic HTML, Word®, Framemaker®, DocBook
  • Interchange: Spirit IP-XACT® XML

Supported Platforms

  • Red Hat® Linux
  • Microsoft® Windows XP®
  • Sun Solaris®

Outputs

Synthesizable RTL
CSRCompiler generates the synthesizable Verilog and VHDL code for configuration, status, interrupts, masks, counters, and other memory-map registers. The synthesizable Verilog code for standard configuration registers can jump start your design. Synthesizable standard bus interfaces, AMBA®, Avalon®, and Wishbone aid in IP integration for multi-core and embedded architectures.

Dynamic HTML Web Pages
An interactive view is provided for browsing the entire design.

Headers for Firmware
CSRCompiler builds the headers for firmware code. Semifore’s single source eliminates the chance of typos and missing parameters.

Data Structures
CSRCompiler generates the C/C++, SystemVerilog, and Perl data structures to jump start system and unit testing of memory-map registers. Spirit IP-XACT XML is provided for interchange. The registers are specified once, and, all the views are generated by CSRCompiler ensuring that they are accurate as the design evolves.

Internal and Customer Documentation
Formatted documentation views provide a clean handoff from design to technical publication. Semifore’s single source eliminates the risk of “stale specifications”. Word©, Framemaker® and DocBook XML are supported.

Legacy Design Checklist
We can work with you to import your existing register maps into CSRSpec. We may be able to fully-automate this process or semi-automate it, depending upon your specific circumstances.

Jumpstart for New Design
With a documentation example and input files, Semifore will jumpstart your design effort and create a starting address map specification within 2 days. Semifore’s single source provides the hardware, software, and documentation views.

Diagnostic Checklist
We ensure that designs are free of common errors: overlapping address, overlapping bits, default value too wide for the field, and many more.

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