`include "./ecclegacy_ecc_legacy_testbench.v" `include "./ecclegacy.vh" module ecc_legacy_configuration_diag(); reg [7:0] expected_8bit_lsb_0; reg [15:0] expected_16bit_lsb_0; reg [31:0] expected_32bit_lsb_0; reg [63:0] expected_64bit_lsb_0; reg [127:0] expected_128bit_lsb_0; reg [0:7] expected_8bit_msb_0; reg [0:15] expected_16bit_msb_0; reg [0:31] expected_32bit_msb_0; reg [0:63] expected_64bit_msb_0; reg [0:127] expected_128bit_msb_0; reg [15:0] readDataValue; reg [15:0] tmpCsr; integer chkAddressError; integer chkReadAccessError; integer chkWriteAccessError; integer loopCount; always @(negedge ecc_legacy_testbench.reset) begin: sim_block chkAddressError = 0; chkReadAccessError = 0; chkWriteAccessError = 0; $display("%d Enable write_enable for registers/fields", $time); $display("%d Start test for Configuration type fields - value of allZeros", $time); $display("%d CSR: chip_config", $time); writeOp(11'h0, {15'h0, 1'h0}); expected_16bit_lsb_0 = {15'h0, 1'h0}; readOp(11'h0, readDataValue); if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: ecc_cntrl_reg", $time); writeOp(11'h80, {14'h0, 1'h0, 1'h0}); expected_16bit_lsb_0 = {14'h0, 1'h0, 1'h0}; readOp(11'h80, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: ecc_int_en_reg", $time); writeOp(11'h98, {14'h0, 1'h0, 1'h0}); expected_16bit_lsb_0 = {14'h0, 1'h0, 1'h0}; readOp(11'h98, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: ecc_err_addr_reg", $time); writeOp(11'h9a, {2'h0, 14'h0}); expected_16bit_lsb_0 = {2'h0, 14'h0}; readOp(11'h9a, readDataValue); if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: diag_cntrl_reg", $time); writeOp(11'h9c, {1'h0, 1'h0, 14'h0}); expected_16bit_lsb_0 = {1'h0, 1'h0, 14'h0}; readOp(11'h9c, readDataValue); if (expected_16bit_lsb_0[15] !== readDataValue[15]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15], readDataValue[15]); end if (expected_16bit_lsb_0[14] !== readDataValue[14]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[14], readDataValue[14]); end if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: ecc_bits_reg", $time); writeOp(11'h9e, {8'h0, 8'h0}); expected_16bit_lsb_0 = {8'h0, 8'h0}; readOp(11'h9e, readDataValue); if (expected_16bit_lsb_0[7:0] !== readDataValue[7:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[7:0], readDataValue[7:0]); end $display("%d CSR: data_reg", $time); writeOp(11'ha0, {16'h0}); expected_16bit_lsb_0 = {16'h0}; readOp(11'ha0, readDataValue); if (expected_16bit_lsb_0[15:0] !== readDataValue[15:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15:0], readDataValue[15:0]); end $display("%d CSR: rx_ecc_cntrl_reg", $time); writeOp(11'h200, {14'h0, 1'h0, 1'h0}); expected_16bit_lsb_0 = {14'h0, 1'h0, 1'h0}; readOp(11'h200, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: rx_ecc_int_en_reg", $time); writeOp(11'h218, {14'h0, 1'h0, 1'h0}); expected_16bit_lsb_0 = {14'h0, 1'h0, 1'h0}; readOp(11'h218, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: rx_ecc_err_addr_reg", $time); writeOp(11'h21a, {2'h0, 14'h0}); expected_16bit_lsb_0 = {2'h0, 14'h0}; readOp(11'h21a, readDataValue); if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: rx_diag_cntrl_reg", $time); writeOp(11'h21c, {1'h0, 1'h0, 14'h0}); expected_16bit_lsb_0 = {1'h0, 1'h0, 14'h0}; readOp(11'h21c, readDataValue); if (expected_16bit_lsb_0[15] !== readDataValue[15]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15], readDataValue[15]); end if (expected_16bit_lsb_0[14] !== readDataValue[14]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[14], readDataValue[14]); end if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: rx_ecc_bits_reg", $time); writeOp(11'h21e, {8'h0, 8'h0}); expected_16bit_lsb_0 = {8'h0, 8'h0}; readOp(11'h21e, readDataValue); if (expected_16bit_lsb_0[7:0] !== readDataValue[7:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[7:0], readDataValue[7:0]); end $display("%d CSR: rx_data_reg", $time); writeOp(11'h240, {16'h0}); expected_16bit_lsb_0 = {16'h0}; readOp(11'h240, readDataValue); if (expected_16bit_lsb_0[15:0] !== readDataValue[15:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15:0], readDataValue[15:0]); end $display("%d CSR: tx_ecc_cntrl_reg", $time); writeOp(11'h400, {14'h0, 1'h0, 1'h0}); expected_16bit_lsb_0 = {14'h0, 1'h0, 1'h0}; readOp(11'h400, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: tx_ecc_int_en_reg", $time); writeOp(11'h418, {14'h0, 1'h0, 1'h0}); expected_16bit_lsb_0 = {14'h0, 1'h0, 1'h0}; readOp(11'h418, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: tx_ecc_err_addr_reg", $time); writeOp(11'h41a, {2'h0, 14'h0}); expected_16bit_lsb_0 = {2'h0, 14'h0}; readOp(11'h41a, readDataValue); if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: tx_diag_cntrl_reg", $time); writeOp(11'h41c, {1'h0, 1'h0, 14'h0}); expected_16bit_lsb_0 = {1'h0, 1'h0, 14'h0}; readOp(11'h41c, readDataValue); if (expected_16bit_lsb_0[15] !== readDataValue[15]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15], readDataValue[15]); end if (expected_16bit_lsb_0[14] !== readDataValue[14]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[14], readDataValue[14]); end if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: tx_ecc_bits_reg", $time); writeOp(11'h41e, {8'h0, 8'h0}); expected_16bit_lsb_0 = {8'h0, 8'h0}; readOp(11'h41e, readDataValue); if (expected_16bit_lsb_0[7:0] !== readDataValue[7:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[7:0], readDataValue[7:0]); end $display("%d CSR: tx_data_reg", $time); writeOp(11'h440, {16'h0}); expected_16bit_lsb_0 = {16'h0}; readOp(11'h440, readDataValue); if (expected_16bit_lsb_0[15:0] !== readDataValue[15:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15:0], readDataValue[15:0]); end $display("%d Enable write_enable for registers/fields", $time); $display("%d Start test for Configuration type fields - value of random", $time); $display("%d CSR: chip_config", $time); writeOp(11'h0, {15'h0, 1'h1}); expected_16bit_lsb_0 = {15'h0, 1'h1}; readOp(11'h0, readDataValue); if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: ecc_cntrl_reg", $time); writeOp(11'h80, {14'h0, 1'h1, 1'h1}); expected_16bit_lsb_0 = {14'h0, 1'h1, 1'h1}; readOp(11'h80, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: ecc_int_en_reg", $time); writeOp(11'h98, {14'h0, 1'h1, 1'h1}); expected_16bit_lsb_0 = {14'h0, 1'h1, 1'h1}; readOp(11'h98, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: ecc_err_addr_reg", $time); writeOp(11'h9a, {2'h0, 14'h492}); expected_16bit_lsb_0 = {2'h0, 14'h492}; readOp(11'h9a, readDataValue); if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: diag_cntrl_reg", $time); writeOp(11'h9c, {1'h1, 1'h1, 14'h555}); expected_16bit_lsb_0 = {1'h1, 1'h1, 14'h555}; readOp(11'h9c, readDataValue); if (expected_16bit_lsb_0[15] !== readDataValue[15]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15], readDataValue[15]); end if (expected_16bit_lsb_0[14] !== readDataValue[14]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[14], readDataValue[14]); end if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: ecc_bits_reg", $time); writeOp(11'h9e, {8'h0, 8'h3f}); expected_16bit_lsb_0 = {8'h0, 8'h3f}; readOp(11'h9e, readDataValue); if (expected_16bit_lsb_0[7:0] !== readDataValue[7:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[7:0], readDataValue[7:0]); end $display("%d CSR: data_reg", $time); writeOp(11'ha0, {16'h1249}); expected_16bit_lsb_0 = {16'h1249}; readOp(11'ha0, readDataValue); if (expected_16bit_lsb_0[15:0] !== readDataValue[15:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15:0], readDataValue[15:0]); end $display("%d CSR: rx_ecc_cntrl_reg", $time); writeOp(11'h200, {14'h0, 1'h1, 1'h1}); expected_16bit_lsb_0 = {14'h0, 1'h1, 1'h1}; readOp(11'h200, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: rx_ecc_int_en_reg", $time); writeOp(11'h218, {14'h0, 1'h1, 1'h1}); expected_16bit_lsb_0 = {14'h0, 1'h1, 1'h1}; readOp(11'h218, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: rx_ecc_err_addr_reg", $time); writeOp(11'h21a, {2'h0, 14'h1fff}); expected_16bit_lsb_0 = {2'h0, 14'h1fff}; readOp(11'h21a, readDataValue); if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: rx_diag_cntrl_reg", $time); writeOp(11'h21c, {1'h1, 1'h1, 14'h555}); expected_16bit_lsb_0 = {1'h1, 1'h1, 14'h555}; readOp(11'h21c, readDataValue); if (expected_16bit_lsb_0[15] !== readDataValue[15]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15], readDataValue[15]); end if (expected_16bit_lsb_0[14] !== readDataValue[14]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[14], readDataValue[14]); end if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: rx_ecc_bits_reg", $time); writeOp(11'h21e, {8'h0, 8'h2a}); expected_16bit_lsb_0 = {8'h0, 8'h2a}; readOp(11'h21e, readDataValue); if (expected_16bit_lsb_0[7:0] !== readDataValue[7:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[7:0], readDataValue[7:0]); end $display("%d CSR: rx_data_reg", $time); writeOp(11'h240, {16'h1999}); expected_16bit_lsb_0 = {16'h1999}; readOp(11'h240, readDataValue); if (expected_16bit_lsb_0[15:0] !== readDataValue[15:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15:0], readDataValue[15:0]); end $display("%d CSR: tx_ecc_cntrl_reg", $time); writeOp(11'h400, {14'h0, 1'h1, 1'h1}); expected_16bit_lsb_0 = {14'h0, 1'h1, 1'h1}; readOp(11'h400, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: tx_ecc_int_en_reg", $time); writeOp(11'h418, {14'h0, 1'h1, 1'h1}); expected_16bit_lsb_0 = {14'h0, 1'h1, 1'h1}; readOp(11'h418, readDataValue); if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[1], readDataValue[1]); end if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[0], readDataValue[0]); end $display("%d CSR: tx_ecc_err_addr_reg", $time); writeOp(11'h41a, {2'h0, 14'h5d1}); expected_16bit_lsb_0 = {2'h0, 14'h5d1}; readOp(11'h41a, readDataValue); if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: tx_diag_cntrl_reg", $time); writeOp(11'h41c, {1'h1, 1'h1, 14'h4ec}); expected_16bit_lsb_0 = {1'h1, 1'h1, 14'h4ec}; readOp(11'h41c, readDataValue); if (expected_16bit_lsb_0[15] !== readDataValue[15]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15], readDataValue[15]); end if (expected_16bit_lsb_0[14] !== readDataValue[14]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[14], readDataValue[14]); end if (expected_16bit_lsb_0[13:0] !== readDataValue[13:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[13:0], readDataValue[13:0]); end $display("%d CSR: tx_ecc_bits_reg", $time); writeOp(11'h41e, {8'h0, 8'h7f}); expected_16bit_lsb_0 = {8'h0, 8'h7f}; readOp(11'h41e, readDataValue); if (expected_16bit_lsb_0[7:0] !== readDataValue[7:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[7:0], readDataValue[7:0]); end $display("%d CSR: tx_data_reg", $time); writeOp(11'h440, {16'h1555}); expected_16bit_lsb_0 = {16'h1555}; readOp(11'h440, readDataValue); if (expected_16bit_lsb_0[15:0] !== readDataValue[15:0]) begin $display("%d ERROR - Expected value: %h, actual value: %h", $time, expected_16bit_lsb_0[15:0], readDataValue[15:0]); end $display("%d Check the read access error.", $time); chkReadAccessError = 1; chkReadAccessError = 0; $display("%d Check the write access error.", $time); chkWriteAccessError = 1; chkWriteAccessError = 0; #500; $finish; end task readOp; input[10:0] address; output[15:0] readDataValue; begin @(posedge ecc_legacy_testbench.clock); ecc_legacy_testbench.csr_address = address; ecc_legacy_testbench.csr_read_access = 1'b1; @(posedge ecc_legacy_testbench.clock); readDataValue = ecc_legacy_testbench.csr_read_data; ecc_legacy_testbench.csr_read_access = 1'b0; end endtask task writeOp; input[10:0] address; input[15:0] writeData; begin @(posedge ecc_legacy_testbench.clock); ecc_legacy_testbench.csr_address = address; ecc_legacy_testbench.csr_write_data = writeData; ecc_legacy_testbench.csr_write_access = 1'b1; @(posedge ecc_legacy_testbench.clock); ecc_legacy_testbench.csr_write_access = 1'b0; end endtask endmodule