`timescale 1s / 1s

module ECC_regs_interrupt_diag();

reg [7:0] expected_8bit_lsb_0;
reg [15:0] expected_16bit_lsb_0;
reg [31:0] expected_32bit_lsb_0;
reg [63:0] expected_64bit_lsb_0;
reg [127:0] expected_128bit_lsb_0;
reg [0:7] expected_8bit_msb_0;
reg [0:15] expected_16bit_msb_0;
reg [0:31] expected_32bit_msb_0;
reg [0:63] expected_64bit_msb_0;
reg [0:127] expected_128bit_msb_0;
reg [15:0] readDataValue;
reg [15:0] designated_readDataValue;
reg [15:0] tmpCsr;
integer  chkAddressError;
integer  chkReadAccessError;
integer  chkWriteAccessError;
integer  loopCount;

always @(negedge ECC_regs_testbench.RST_I) begin: sim_block
  chkAddressError = 0;
  chkReadAccessError = 0;
  chkWriteAccessError = 0;

  $display("%d Start test for Interrupt type fields", $time);

  $display("%d Initialize Register: pckt_mem_regs_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h82, readDataValue);

  $display("%d Initialize Register: rx_mem_regs_3_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h382, readDataValue);

  $display("%d Initialize Register: rx_mem_regs_2_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h302, readDataValue);

  $display("%d Initialize Register: rx_mem_regs_1_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h282, readDataValue);

  $display("%d Initialize Register: rx_mem_regs_0_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h202, readDataValue);

  $display("%d Initialize Register: tx_mem_regs_3_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h582, readDataValue);

  $display("%d Initialize Register: tx_mem_regs_2_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h502, readDataValue);

  $display("%d Initialize Register: tx_mem_regs_1_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h482, readDataValue);

  $display("%d Initialize Register: tx_mem_regs_0_ecc_int_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h402, readDataValue);

  $display("%d CSR: pckt_mem_regs_ecc_int_reg", $time);

  $display("%d Initialize Register: pckt_mem_regs_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h98, readDataValue);
  
  $display("%d field: pckt_mem_regs_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: pckt_mem_regs_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h98, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h98, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: pckt_mem_regs_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: pckt_mem_regs_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h98, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h98, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in pckt_mem_regs_ecc_int_reg", $time);
  readOp(16'h82, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: pckt_mem_regs_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: pckt_mem_regs_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h98, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h98, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: pckt_mem_regs_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: pckt_mem_regs_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h98, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h98, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in pckt_mem_regs_ecc_int_reg", $time);
  readOp(16'h82, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: pckt_mem_regs_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: pckt_mem_regs_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h98, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h98, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: pckt_mem_regs_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: pckt_mem_regs_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h98, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h98, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in pckt_mem_regs_ecc_int_reg", $time);
  readOp(16'h82, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: pckt_mem_regs_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: pckt_mem_regs_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h98, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h98, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: pckt_mem_regs_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: pckt_mem_regs_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h98, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h98, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.pckt_mem_regs_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in pckt_mem_regs_ecc_int_reg", $time);
  readOp(16'h82, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h82, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h82, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end

  $display("%d CSR: rx_mem_regs_3_ecc_int_reg", $time);

  $display("%d Initialize Register: rx_mem_regs_3_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h398, readDataValue);
  
  $display("%d field: rx_mem_regs_3_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_3_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h398, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h398, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_3_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_3_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h398, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h398, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_3_ecc_int_reg", $time);
  readOp(16'h382, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_3_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_3_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h398, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h398, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_3_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_3_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h398, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h398, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_3_ecc_int_reg", $time);
  readOp(16'h382, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_3_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_3_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h398, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h398, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_3_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_3_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h398, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h398, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_3_ecc_int_reg", $time);
  readOp(16'h382, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_3_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_3_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h398, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h398, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_3_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_3_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h398, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h398, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_3_ecc_int_reg", $time);
  readOp(16'h382, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h382, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h382, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end

  $display("%d CSR: rx_mem_regs_2_ecc_int_reg", $time);

  $display("%d Initialize Register: rx_mem_regs_2_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h318, readDataValue);
  
  $display("%d field: rx_mem_regs_2_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_2_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h318, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h318, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_2_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_2_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h318, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h318, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_2_ecc_int_reg", $time);
  readOp(16'h302, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_2_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_2_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h318, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h318, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_2_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_2_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h318, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h318, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_2_ecc_int_reg", $time);
  readOp(16'h302, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_2_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_2_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h318, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h318, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_2_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_2_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h318, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h318, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_2_ecc_int_reg", $time);
  readOp(16'h302, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_2_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_2_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h318, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h318, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_2_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_2_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h318, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h318, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_2_ecc_int_reg", $time);
  readOp(16'h302, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h302, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h302, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end

  $display("%d CSR: rx_mem_regs_1_ecc_int_reg", $time);

  $display("%d Initialize Register: rx_mem_regs_1_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h298, readDataValue);
  
  $display("%d field: rx_mem_regs_1_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_1_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h298, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h298, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_1_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_1_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h298, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h298, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_1_ecc_int_reg", $time);
  readOp(16'h282, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_1_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_1_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h298, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h298, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_1_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_1_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h298, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h298, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_1_ecc_int_reg", $time);
  readOp(16'h282, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_1_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_1_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h298, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h298, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_1_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_1_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h298, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h298, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_1_ecc_int_reg", $time);
  readOp(16'h282, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_1_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_1_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h298, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h298, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_1_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_1_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h298, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h298, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_1_ecc_int_reg", $time);
  readOp(16'h282, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h282, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h282, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end

  $display("%d CSR: rx_mem_regs_0_ecc_int_reg", $time);

  $display("%d Initialize Register: rx_mem_regs_0_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h218, readDataValue);
  
  $display("%d field: rx_mem_regs_0_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_0_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h218, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h218, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_0_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_0_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h218, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h218, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_0_ecc_int_reg", $time);
  readOp(16'h202, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_0_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_0_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h218, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h218, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_0_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_0_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h218, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h218, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_0_ecc_int_reg", $time);
  readOp(16'h202, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: rx_mem_regs_0_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_0_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h218, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h218, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_0_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_0_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h218, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h218, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_0_ecc_int_reg", $time);
  readOp(16'h202, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_0_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: rx_mem_regs_0_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h218, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h218, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: rx_mem_regs_0_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: rx_mem_regs_0_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h218, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h218, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.rx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in rx_mem_regs_0_ecc_int_reg", $time);
  readOp(16'h202, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h202, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h202, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end

  $display("%d CSR: tx_mem_regs_3_ecc_int_reg", $time);

  $display("%d Initialize Register: tx_mem_regs_3_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h598, readDataValue);
  
  $display("%d field: tx_mem_regs_3_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_3_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h598, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h598, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_3_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_3_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h598, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h598, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_3_ecc_int_reg", $time);
  readOp(16'h582, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_3_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_3_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h598, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h598, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_3_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_3_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h598, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h598, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_3_ecc_int_reg", $time);
  readOp(16'h582, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_3_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_3_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h598, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h598, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_3_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_3_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h598, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h598, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_3_ecc_int_reg", $time);
  readOp(16'h582, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_3_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_3_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h598, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h598, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_3_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_3_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h598, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h598, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_3_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_3_ecc_int_reg", $time);
  readOp(16'h582, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h582, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h582, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end

  $display("%d CSR: tx_mem_regs_2_ecc_int_reg", $time);

  $display("%d Initialize Register: tx_mem_regs_2_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h518, readDataValue);
  
  $display("%d field: tx_mem_regs_2_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_2_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h518, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h518, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_2_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_2_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h518, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h518, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_2_ecc_int_reg", $time);
  readOp(16'h502, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_2_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_2_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h518, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h518, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_2_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_2_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h518, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h518, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_2_ecc_int_reg", $time);
  readOp(16'h502, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_2_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_2_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h518, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h518, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_2_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_2_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h518, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h518, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_2_ecc_int_reg", $time);
  readOp(16'h502, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_2_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_2_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h518, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h518, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_2_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_2_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h518, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h518, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_2_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_2_ecc_int_reg", $time);
  readOp(16'h502, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h502, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h502, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end

  $display("%d CSR: tx_mem_regs_1_ecc_int_reg", $time);

  $display("%d Initialize Register: tx_mem_regs_1_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h498, readDataValue);
  
  $display("%d field: tx_mem_regs_1_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_1_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h498, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h498, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_1_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_1_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h498, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h498, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_1_ecc_int_reg", $time);
  readOp(16'h482, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_1_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_1_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h498, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h498, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_1_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_1_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h498, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h498, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_1_ecc_int_reg", $time);
  readOp(16'h482, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_1_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_1_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h498, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h498, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_1_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_1_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h498, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h498, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_1_ecc_int_reg", $time);
  readOp(16'h482, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_1_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_1_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h498, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h498, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_1_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_1_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h498, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h498, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_1_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_1_ecc_int_reg", $time);
  readOp(16'h482, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h482, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h482, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end

  $display("%d CSR: tx_mem_regs_0_ecc_int_reg", $time);

  $display("%d Initialize Register: tx_mem_regs_0_ecc_int_en_reg", $time);

  readDataValue = 16'h0;
  writeOp(16'h418, readDataValue);
  
  $display("%d field: tx_mem_regs_0_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_0_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h418, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h418, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_0_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_0_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h418, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h418, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_0_ecc_int_reg", $time);
  readOp(16'h402, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_0_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_0_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h418, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h418, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_0_ecc_int_reg_sbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_0_ecc_int_reg_sbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h418, readDataValue);
  tmpCsr = 16'h2;
  readDataValue[1] = tmpCsr[1];
  writeOp(16'h418, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 1;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_sbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_0_ecc_int_reg", $time);
  readOp(16'h402, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[1] = 0;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[1] !== readDataValue[1]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[1], readDataValue[1]);
  end
  
  $display("%d field: tx_mem_regs_0_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_0_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h418, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h418, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_0_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 0, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_0_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h418, readDataValue);
  tmpCsr = 16'h0;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h418, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_0_ecc_int_reg", $time);
  readOp(16'h402, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_0_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 0");

  $display("%d Enable interrupt; field: tx_mem_regs_0_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h418, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h418, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h0;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  
  $display("%d field: tx_mem_regs_0_ecc_int_reg_mbe_int", $time);
  $display("Register has hierarchical int: 0, hierarchical int. has enable: 0, enable hierarchical int: 0");
  $display("Register has interrupt_enable_port: 0, enable register_interrupt_enable port: 0");
  $display("status int. has enable: 1, enable status int: 1, status int. flag: 1");

  $display("%d Enable interrupt; field: tx_mem_regs_0_ecc_int_reg_mbe_int", $time);

  $display("%d Generate Read/Modify/Write op.", $time);
  readOp(16'h418, readDataValue);
  tmpCsr = 16'h1;
  readDataValue[0] = tmpCsr[0];
  writeOp(16'h418, readDataValue);
  @(posedge ECC_regs_testbench.CLK_I);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h1;


  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 1;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end

  $display("%d Deactivate the source for level type interrupt", $time);
  ECC_regs_testbench.tx_mem_regs_0_ecc_int_reg_mbe_int_source <= 1'h0;
  @(posedge ECC_regs_testbench.CLK_I);
  $display("%d Clear the Interrupt Status in tx_mem_regs_0_ecc_int_reg", $time);
  readOp(16'h402, readDataValue);

  $display("%d Check interrupt status", $time);
  expected_16bit_lsb_0[0] = 0;
  readOp(16'h402, readDataValue);
  if (expected_16bit_lsb_0[0] !== readDataValue[0]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[0], readDataValue[0]);
  end
  readOp(16'h402, readDataValue);
  expected_16bit_lsb_0[15:2] = 0;
  if (expected_16bit_lsb_0[15:2] !== readDataValue[15:2]) begin
    $display("%d ERROR - Expected value: %h, actual value: %h",
              $time, expected_16bit_lsb_0[15:2], readDataValue[15:2]);
  end
  $display("%d TEST FINISHED!", $time);
  #500; $finish;

end

task readOp;
  input[15:0] address;
  output[15:0] readDataValue;
  begin
    @(posedge ECC_regs_testbench.CLK_I);
    ECC_regs_testbench.ADR_I = address;
    ECC_regs_testbench.CYC_I = 1'b1;
    ECC_regs_testbench.STB_I = 1'b1;
    ECC_regs_testbench.WE_I = 1'b0;
    @(posedge ECC_regs_testbench.ACK_O);
    @(posedge ECC_regs_testbench.CLK_I);
    ECC_regs_testbench.STB_I = 1'b0;
    readDataValue = ECC_regs_testbench.DATA_O;
  end
endtask

task writeOp;
  input[15:0] address;
  input[15:0] writeData;
  begin
    @(posedge ECC_regs_testbench.CLK_I);
    ECC_regs_testbench.ADR_I = address;
    ECC_regs_testbench.CYC_I = 1'b1;
    ECC_regs_testbench.STB_I = 1'b1;
    ECC_regs_testbench.WE_I = 1'b1;
    ECC_regs_testbench.DATA_I = writeData;
    @(posedge ECC_regs_testbench.ACK_O);
    @(posedge ECC_regs_testbench.CLK_I);
    ECC_regs_testbench.STB_I = 1'b0;
  end
endtask

endmodule